POS-PHY Level 3 PHY

"Features
Conforms to POS-PHY level 2 and level 3 specifications
POS-PHY level 3 compliant with the POS-PHY Level 3 Specification, Issue 4, June 2000; POS-PHY level 2 compliant with the POS-PHY Level 2 Specification, Issue 5, December 1998
Link-layer or PHY-layer POS-PHY interfaces
Creates bridges between different POS-PHY interfaces
Supports traffic up to a rate of 3.2 Gbps (POS-PHY level 3) or 832 Mbps (POS-PHY level 2), such as SONET OC-48
Single-PHY (SPHY) or up to 8-channel multi-PHY (MPHY) operation with polled and direct packet available options
Up to 104-MHz operation, allowing interconnection of different rate streams
Atlantic™ interface that allows a consistent interface between all Altera® cell and packet MegaCore® functions
Selectable POS-PHY interface bus widths (8/16/32 bit) and Atlantic interface bus widths (8/16/32/64 bit)—allowing translation between different bus types
Parity generation/detection
Configurable first-in first-out (FIFO) buffer options: selectable FIFO buffer width, depth, and fill thresholds
Easy-to-use IP Toolbench interface
IP functional simulation models for use in Altera-supported VHDL and Verilog HDL simulators
Support for OpenCore Plus evaluation
General Description
The POS-PHY Level 2 and 3 Compiler generates MegaCore functions for use in link-layer or physical (PHY) layer devices that transfer data to and from packet over SONET/SDH (POS) devices using the standard POS-PHY bus. The compiler comprises separately configurable modules, which can be easily combined via IP Toolbench to generate a highly parameterized module, allowing POS-PHY compliant interfaces (and non-standard interfaces) to be included in custom designs.

The compiler supports POS-PHY level 3 operating at up to 3.2 gigabits per second (Gbps), and level 2 operating at up to 832 megabits per second (Mbps).

The POS-PHY Level 2 and 3 Compiler is compliant with all applicable standards, including:

POS-PHY Level 3 Specification, Issue 4, June 2000
POS-PHY Level 2 Specification, Issue 5, December 1998
Optical Internetworking Forum (OIF), System Packet Interface Level 3 (SPI-3)
Altera Corporation, Atlantic Interface Specification
This allows efficient translation between the different formats, including mapping between different bus speeds and bus widths, as well as customizable FIFO buffer parameters.

The compiler allows configurations such as PHY-PHY, link-link bridges, or packet multiplexing cores, and single PHY and MPHY applications."