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Solaris
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Mixed
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Other
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No preference
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Total votes: 4790

PCI Express Cores x1, x4, x8

IP Vendor: 
Northwest Logic, Inc.
IP Target Vendor: 
Altera
IP Type: 
Design
IP Category: 
Bus Interface and IO
IP Supported FPGA Device: 
Cyclone
Cyclone II
Stratix
Stratix GX
Stratix II
Stratix II GX
IP Description: 

"Features
High-performance, easy-to-use core
Available in x1, x4, x8 lane configurations
Support for integrated or external discrete PCI Express PHYs
Flexible data buffer sizing
Implements all three PCI Express layers (transaction, data link, and physical)
Support for up to eight virtual channels and eight traffic classes
Support for independent user and physical interface clock domains
Complete error-handling support
Comprehensive status port provides a wealth of diagnostic information that can be used for system-level debug and link stability monitoring
Push-button timing achieved with minimal routing constraints, even in low-cost, slower speed grade FPGA families
Provided with comprehensive source code PCI Express verification suite
PCI Express base specification revision 1.1 compliant
Fully validated, including PCI-Sig, nSys, NVS, Catalyst SpekChek, and Lecroy CTS certification
Customization and integration services available
Available with development boards
Core source code available
Available with Windows and Linux drivers
Available with GUI for Windows
Fast response and expert technical support provided by experienced Northwest Logic IP designers

Description
The Northwest Logic x1, x4, x8 PCI Express core provides a flexible, high-performance, easy-to-use local interface to the PCI Express bus. The core implements all three layers defined by the PCI Express standard and supports all key PCI Express features, including multiple virtual channels and traffic classes.

The core provides:

A control interface with consistent timing and function over all modes of operation
A data interface that connects directly to first-in-first-out (FIFO) interfaces
Separate clock domain transfers performed by the core for each virtual channel
Complete error-handling support
Push-button place-and-route timing with minimal routing constraints
The core is provided with a comprehensive verification suite with complete scripting and random stimulus capabilities that allow you to fully validate your design prior to use in hardware. The core has been extensively verified through ASIC-level testing methodologies and has been integrated in a wide variety of applications.

Also available from Northwest Logic are PCI Express development boards that you can use to quickly prototype a complete PCI Express system. A demo GUI, drivers, and an FPGA reference design are provided with the board.

Northwest Logic also provides customization and integration services to produce complete logic designs or sub-systems."

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