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What is your preferred platform for FPGA Design Flow ?
Windows
54%
Linux
37%
Solaris
1%
Mixed
3%
Other
1%
No preference
4%
Total votes: 3278

Numerically-Controlled Oscillator

IP Vendor: 
Lattice
IP Target Vendor: 
Lattice
IP Type: 
Design
IP Category: 
DSP - Digital Signal Processing
IP Description: 

Features

Multi-channel support up to 16 channels
Variable phase increment
Variable phase offset input
Variable phase resolution
Variable phase quantization (3 to 20 bits)
Variable amplitude resolution (4 to 32 bits)
Full wave, 1/2 wave, or 1/4 wave architecture
Optional sum of angles (SOA) optimization for memory
Optional Phase Dithering Correction (up to 4 bits)
Optional Trigonometric Correction for SFDR up to 115 dB
Optional Quadrature Amplitude Modulation (QAM)"

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