Poll
J.83 Annex B cable modulator

IP Vendor:
MVD Cores
IP Target Vendor:
Xilinx
IP Code Language:
VHDL
IP Type:
Design
IP Category:
Audio, Video and Image Processing IP Supported FPGA Device:
Spartan-3
Spartan-3A
Spartan-3A DSP
Spartan-3E
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-5 FXT
Virtex-5 LX
Virtex-5 LXT
Virtex-5 SXT
IP Description:
Description
The MVD Cable modulator J83B core is a drop-in module that includes the following functions:
- Input data framer from DVB-SPI source (MPEG-TS flow)
- J83B modulator
- Energy dispersal,
- Reed Solomon encoder
- Interleaver
- QAM symbol mapper
- Programmable RRC filter
- Flexible Digital Up Converter
- Modulator for FI output
- Output for simple DAC (14 bits) or complex DAC (2x16bits)
Features
- ITU-T J.83 Annex B compliant baseband transmitter for Cable Modem Termination Systems (CMTS)
- Drop-in module for Virtex-5™, Virtex-4™ and Spartan™-3/E/A FPGAs
- Single clock (up to 140 MHz+ for Spartan-3™, 180 MHz+ for Virtex-4™ and Virtex-5™)
- Robust SPI input (discarding of incorrect input packets)
- PCR re-stamping
- Supports 5.056941 & 5.360537 symbol rates
- Programmable 64 and 256 QAM Symbol Mapping
- All interleaver modes supported thanks to external Synchronous SRAM
- Reduced interleaver modes can be implemented as internal memory
- Intermediate frequency output for single DAC (14 bits) or complex DAC (2 x 16 bits)
- Single channel - support for multi channel
- Full synthetizable RTL VHDL design (not delivered) for easy customization
- Design delivered as Netlist
- MER > 43dB
The J.83B cable modulator modules an MPEG-TS DVB-SPI input into a QAM-16/256 output in base band or IF.
DescriptionThe MVD Cable modulator J83B core is a drop-in module for FPGA that includes the following functions:
- Input data framer from DVB-SPI source (MPEG-TS flow)
- J83B modulator
- Energy dispersal,
- Reed Solomon encoder
- Interleaver
- QAM symbol mapper
- Programmable RRC filter
- Flexible Digital Up Sampler
- Modulator for FI output
- Output for simple DAC (14 bits) or complex DAC (2x16bits)
Features
- ITU-T J.83 Annex B compliant baseband transmitter for Cable Modem Termination Systems (CMTS)
- Drop-in module for Virtex-6™, Virtex-5™, Spartan-6™ and Spartan™-3/E/A/ FPGA
- Single clock (up to 140 MHz+ for Spartan-3/6™, 180 MHz+ for Virtex-5/6™)
- Robust SPI input (discarding of incorrect input packets)
- PCR re-stamping
- Supports 5.056941 & 5.360537 symbol rates
- Programmable 64 and 256 QAM Symbol Mapping
- All interleaver modes supported thanks to external Synchronous SRAM
- Reduced interleaver modes can be implemented as internal memory
- Intermediate frequency output for single DAC (14 bits) or complex DAC (2 x 16 bits)
- Single channel - support for multi channel
- Full synthetizable RTL VHDL design (not delivered) for easy customization
- Design delivered as Netlist
- MER > 43dB
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