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DVB Remultiplexer 1-to-2
IP Target Vendor:Xilinx
IP Category:Audio, Video and Image Processing
IP Supported FPGA Device:
The MVD DVB remultiplexer 1-to-2 core is a drop-in module for reducing the MPEG TS rate by filtering services selected by an external host controller.
- The remultiplexer is managed by an external host via the RS232 link. The host is in charge to read the statistical data and to select the services to filter.
- Generation of a new NIT follows 3 possibilities:
- pass through of the current NIT
- new one provided by the host
- autogeneration of a simple one with channel numbering
- Regeneration of PSI/SI tables PAT and SDT independtly of the output.
- Large smoothing FIFO to optimize the bandwidth of the output rate.
- Drop-in module for Virtex-5™, Virtex-4™ and Spartan™-3A_DSP FPGAs
- 1 SPI input / 2 SPI outputs
- Converts an MPEG TS mux rate into 2 independent MPEG TS mux rates
- Management of PSI/SI tables (automatic tables generator) according to ETS300 468 and ISO 13818-1
- Configurable via a RS232 link
- Service filtering and insertion
- Full PCR re-stamping
- External or internal output mux rate
- Statistical service in bandwidth estimation
- Optimize output mux rate thanks to smoothing FIFO
- Smoothing FIFO is implemented as block RAM (no need of external component)
- Configurable size of the smoothing FIFO
- Full synthesizable RTL design (not delivered) for easy customization
- Netlist version available for ISE 10 and later
MPEG TS rate decrease by filtering services. 1 input / 2 outputs.