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Longitudinal Time Code Generator

IP Vendor: 
Deltatec S.A.
IP Target Vendor: 
Xilinx
IP Type: 
Design
IP Category: 
Audio, Video and Image Processing
IP Supported FPGA Device: 
Spartan-3
Spartan-IIE
Virtex-II
Virtex-II Pro
IP Description: 

"The LTC generator core accepts 80 bits of SMPTE/EBU audio Longitudinal Time Code from its 16 bits wide µP interface. The LTC generator synchronizes on the falling edge of the incoming reference signal to start transmission of the received time code. The 80 bits long time code is serialized, biphase mark encoded and transmitted over the full video frame. A simple external analog audio interface is necessary to properly shape (gain & slope adjustment) the digital LTC bitstream.

Device Family Support
# Virtex-II Pro
# Virtex-II
# Spartan-3
# Spartan-IIE

Key Features:-
# SMPTE/EBU LTC time code generator
# Lock-on external video reference
# PAL/NTSC support
# Uses 27 Mhz clock input for internal timing
# 5*16 bits double buffered registers for time code data and sync word
# Versatile synchronization"

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