Poll

What is your preferred platform for FPGA Design Flow ?:

IPX-UDP: UDP Protocol Manager

IP Vendor: 
intoPIX s.a.
IP Target Vendor: 
Xilinx
IP Type: 
Design
IP Category: 
Communication and Networking
IP Supported FPGA Device: 
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-5 FXT
Virtex-5 LX
Virtex-5 LXT
Virtex-5 SXT
IP Description: 

The IPX-UDP is responsible
for receiving UDP packets (including video/audio assets) on a gigabit
Ethernet link.

The MAC controller is
based on the Tri-Mode MAC controller hard-coded within the Virtex-5
SXT or LXT technology.

intoPIX configures the
MAC controller with a specific MAC address read from a dedicated register
an also sets up the external PHY chip.

The selected protocol
(SGMII, GMII or RGMII), the exact chip reference and the corresponding
user manual must be provided by the customer.

To speed up the development,
intoPIX recommends SGMII protocol.

The protocol handler
will manage the user UDP protocol.
 

This handler is responsible for:  

  •  
    •  
      • receiving video/audio packets.
      • verifying the integrity with
        IP and UDP checksum and Ethernet CRC
      • sending a response packet
        back every n packets received.

If a packet is missing or corrupted,
the UDP handler will reject all subsequent packets while waiting for
a correct retransmission of its related n packet group.
 

Resource: 

Rocket IOs:  2

Slices:  2000 slices

RAMBs: 16 RAMBs (for 1500 bytes Ethernet
Frames)

DSPs: Non

Frequency:  125 MHz

      PHY
component:  Marvell 88E1111 (with SGMII protocol) or any other compatible
chip

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