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IPX-DDR2: DDR2 Memory controller

IP Vendor: 
intoPIX s.a.
IP Target Vendor: 
Xilinx
IP Type: 
Design
IP Category: 
Communication and Networking
IP Supported FPGA Device: 
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-5 FXT
Virtex-5 LX
Virtex-5 LXT
Virtex-5 SXT
IP Description: 

The IPX-DDR2 core is
a DDR2 memory controller for Virtex-5 device running up to 266 MHz and
bus width of up to 64 bits. This intoPIX core reduces the number of
logic resources and improves the latency of row accesses.

The user interface is
a bus up to a 256-bit width running up to 133 MHz. The maximum peak
rate transfer is 64 x 2 x 266 ~= 34 Gbit/s.

The physical bus width
is selectable between 8, 16, 32 and 64 bits, and the user interface
also selectable between 32, 64, 128 or 256 bit.

This core also guarantees
efficient DDR2 accesses to the intoPIX IPX-JP2K / IPX-JP4K core.

Resource:

Slices: Less than 1500 slices for a 32-bit
wide physical data-bus; user

data bus of 128-bit

RAMBs: Non

DSPs: Non

Frequency: 266MHz (533 Mbps per data bit)

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