Poll

What is your preferred platform for FPGA Design Flow ?
Windows
55%
Linux
36%
Solaris
1%
Mixed
2%
Other
1%
No preference
4%
Total votes: 4815

HDLC, Single-Channel

IP Vendor: 
Avnet
IP Target Vendor: 
Xilinx
IP Type: 
Design
IP Category: 
Communication and Networking
IP Supported FPGA Device: 
Spartan-3
Virtex-II
Virtex-II Pro
IP Description: 

"The Memec Design Single-Channel XF-HDLC Controller serves as a starting point for a custom design that gives full duplex operation, 16-bit/32-bit CCITT-CRC generation and checking. Features include flag and zero insertion and detection, DC to 53 Mbps (STS-1) data rate, full synchronous operation, and possible user customation of FIFO and DMA interfaces.

Device Family Support

Virtex-II Pro

Virtex-II

Spartan-3

Key Features

16/32-bit frame sequence

8/16-bit addr insert/delete, flag/zerop insert/detection"

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