What is your preferred platform for FPGA Design Flow ?:


IP Target Vendor: 
IP Type: 
IP Category: 
Communication and Networking
IP Supported FPGA Device: 
Cyclone II
Stratix II
IP Description: 

Supports up to OC-48 bandwidth
Multiplexes up to 2 ports of gigabit Ethernet traffic plus up to an additional 2 ports of fast Ethernet traffic into SONET
Integrates with Altera's POS-PHY Level 3 core
Configurable destination port address
Complies with frame-mapped generic framing procedures (GFPs) outlined by the International Telecommunications Union
Supports a link-layer function
Provides gigabit Ethernet traffic statistics per port
Plugs-and-plays with Altera's POS-PHY Level 3 cores
The interfaces and protocols includes the AtlanticTM interface, AIRbus (16-bit slave), and frame-mapped generic framing procedures

The GEOS-2+2 is designed to multiplex 2 channels of gigabit Ethernet traffic and 2 channels of fast Ethernet traffic into a single port 2.5 Gbps OC-48 SONET Framer using frame-mapped GFP.

There are three main sub-modules for the GEOS-2+2 core:

ESMUX module multiplexes packets in the ingress (Ethernet-to-SONET) direction
SEDEMUX module de-multiplexes packets in the egress (SONET-to-Ethernet) direction
CPU interface module that connects up to an external CPU
The ESMUX multiplexes 2 GE with 2 fast Ethernet ports into one 2.5 Gbps SONET port. Jumbo packets are not supported by the GEOS-2+2. Each first-in, first-out (FIFO) channel is connected to one particular Atlantic interface from the PL3 core. A GFP header is attached to packets and sent to the PL3 core and then to the SONET framer. The GFP header contains various fields, such as destination port identification.

Packets received by the SEDEMUX from the SONET framer include a GFP header that contains a destination port. The GFP header is removed and the resulting packet is routed to the appropriate destination port"

Facebook  Twitter  Linkedin  YouTube      RSS


Check out FPGA related videos

Find Us On Facebook