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Gamma Correction, Dynamic

IP Target Vendor: 
Xilinx
IP Type: 
Design
IP Category: 
Audio, Video and Image Processing
IP Supported FPGA Device: 
Spartan-3
Virtex-E
Virtex-II
Virtex-II Pro
IP Description: 

"Global LUT based method on RGB output which will be dynamically adjusted based on statistics on a per frame basis. The operation is performed in the RGB color space and applied to each of the colors. Calculations involve logarithmic, power, multiplication, and division operations on the statistics to create appropriate LUTS and will require the use of a Xilinx MicroBlaze core for the analysis. Input and output LUTS also require knowledge of source and destination Gamma which can be entered thru a separately available GUI. This core has been hardware tested with other DDC IP in a video display reference design using the Xilinx TORA board reference platform.

Device Family Support
# Virtex-II Pro
# Virtex-II
# Virtex-E
# Spartan-3"

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