Floating Point Square Root Operator
"The AllianceCORE DFPSQRT uses the pipelined mathematics algorithm to compute square root function. The input number format is according to IEEE-754 standard. DFPSQRT supports single precision real numbers. SQRT operation can be pipelined up to 9 levels. Input data are fed every clock cycle. The first result appears after 9 clock periods latency and next results are available each clock cycle. Precision and accuracy are parameterized.
Device Family Support
Full IEEE-754 compliance.
Single precision real format numbers.
Results available at every clock.
Overflow, underflow and invalid operation flags.
Fully synthesizable, static synchronous design with no internal tri-states."