World's Largest FPGA/CPLD Portal
Poll
What is your preferred platform for FPGA Design Flow ?
Windows
54%
Linux
37%
Solaris
1%
Mixed
3%
Other
1%
No preference
4%
Total votes: 3278
Floating Point Operator Library
IP Vendor:
Amphion Semiconductor, Ltd.
IP Target Vendor:
Altera
IP Type:
Design
IP Category:
Math IP Supported FPGA Device:
Acex 1K
Apex 20KC
Apex 20KE
Apex II
Flex 10KE
IP Description:
"Floating-point operation implementation in programmable logic is now easy with the Amphion floating-point operator library, which consists of the following:
Floating-point adderâ€â€ÂRegistrable output and optional pipeline cuts, both addends have the same exponent size.
Floating-point dividerâ€â€ÂUsing radix-2 SR 0 array. Default quotient value when in operation = 0/0.
Floating-point multiplier"
Check out FPGA related videos
Find Us On Facebook
FPGA Central is a website bringing the FPGA (Field Programable Gate Array), CPLD , PLD, VLSI community together at one central location. Some Keywords: FGPA, FPGA, EDA Tools, FPGA Design, Central, Programmable logic, LUT, VLSI, SoC, Journal
Privacy Policy || Terms of Use
 |
 |