What is your preferred platform for FPGA Design Flow ?:

Floating Point Comparator

IP Target Vendor: 
IP Type: 
IP Category: 
Basic Logic
IP Supported FPGA Device: 
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-II Pro
IP Description: 

"The AllianceCORE DFPCOMP compares two arguments. The input numbers format is according to IEEE-754 standard. DFPCOMP supports single precision real numbers. Compare operation was pipelined up to 1 level. Input data are fed every clock cycle. The first result appears after 1 clock period latency and next results are available each clock cycle. Full IEEE-754 unordered compare function is included.

Device Family Support
# Virtex-4 FX
# Virtex-4 LX
# Virtex-4 SX
# Virtex-II Pro
# Spartan-3L
# Spartan-3E
# Spartan-3

Key Features
# Full IEEE-754 compliance
# Single precision real format numbers
# Simple interface
# Results available at every clock
# Overflow, underflow and invalid operation flags
# Fully configurable
# Fully synthesizable, static synchronous design with no internal tri-states"

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