Home
World's Largest FPGA/CPLD Portal


Poll

What is your preferred platform for FPGA Design Flow ?
Windows
54%
Linux
37%
Solaris
1%
Mixed
3%
Other
1%
No preference
4%
Total votes: 3278

FFT/IFFT High Performance 64-Point

IP Target Vendor: 
Altera
IP Type: 
Design
IP Category: 
DSP - Digital Signal Processing
IP Supported FPGA Device: 
Acex 1K
Apex 20KC
Apex 20KE
Apex II
Flex 10KE
IP Description: 

"Features
High performance
No external memory required
Easy to use

Description
The Amphion high performance 64-point FFT/IFFT megafunction, FFT64HP, performs forward or inverse FFT functions on complex data containing 64 points.

Data is loaded into the workspace RAM in normal sequential order. The transformed data comes out from the function in radix-4 digitally-reversed order with the index indicated by output QIX.

The FFT64HP megafunction is based on the radix-4 decimation in frequency (DIF) algorithm. It performs the computation concurrently in three highly pipelined cascaded stages. The FFT64P megafunction is capable of processing continuous input data and contains all the necessary circuits to support this continuous processing.

The internal complex programmable logic device (CPLD) memory is utilized and the whole circuit is on a single device. Both the input and output are complex numbers in the two’s complement format. The input wordlength is 9 bits and the output wordlength is 12 bits. The twiddle factors and internal commutation data wordlengths are 12 bits.

The function can accept continuous input data, i.e., a 64-point data block every 64 clock cycles. When clocked at 54 MHz, the function achieves continuous computation speed of approximately 1.19 ms. The computation has a latency of 174 clock cycles."

Facebook  Twitter  Linkedin  Orkut  YouTube      RSS

Check out FPGA related videos

Find Us On Facebook