FFT/IFFT

"Features
Radix-4 and mixed radix-2/4 implementations
Variable transform length
Block floating-point architecture—maximizes internal signal dynamic range
Uses internal memory
Optimized to use Stratix® III, Stratix II, Stratix II GX , Stratix GX, and Stratix DSP blocks and TriMatrixTM memory architecture
Preliminary support for Stratix III devices
Uses Cyclone® II embedded multipliers
IP functional simulation models for use in Altera-supported VHDL and Verilog HDL simulators
General Description
The FFT MegaCore® function is a high performance, highly-parameterizable FFT processor. The FFT function implements a radix-2/4 decimation-in-frequency (DIF) FFT algorithm for transform lengths of 2m where 6 ? m ? 14, internally using a block-floating-point architecture to maximize signal dynamic range in the transform calculation.

The FFT MegaCore function accepts, as input, a complex data vector of length N (in two’s complement format) and outputs the transform-domain complex vector in natural order. An accumulated block exponent is output to indicate any data scaling that has occurred during the transform to maintain precision and maximize the internal signal-to-noise ratio. Transform direction is specifiable on a per-block basis via an input port."