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Ethernet PCS, 10G

IP Vendor: 
Avnet
IP Type: 
Design
IP Target Vendor: 
Xilinx
IP Category: 
Communication and Networking
IP Supported FPGA Device : 
Virtex-II
IP Description: 

The Memce Design MC-XIL-10GEPCS core implements the physical coding sublayer required between the Media Access Control (MAC) device and the optical transponder. A MAC-level device interfaces to the PCS via XGMII. The PCS performs the physical coding using 64/66 encoding and scrambling in the transmit direction, and descrambling, 66/64 decoding in the receive direction. The 66-bit words are read / written 16-bits at a time between the optical transponder via the 16-bit LVDS 10 Gbps Serial Bus Interface (XSBI). The optical transponder serializes and deserializes the electrical data and drives the fiber.

Device Family Support

Virtex-II

Key Features

IEEE 802.3ae PCS for 64B/66B, type 10GBASE R

Asynchronous XGMII transmit and receive ports"

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