Poll

What is your preferred platform for FPGA Design Flow ?:

EP501: NAND Flash Controller

IP Vendor: 
Eureka Technology
IP Target Vendor: 
Lattice
IP Type: 
Design
IP Category: 
Memory Interface and Storage Element
IP Description: 

"Features
Supports up to 4 banks of NAND Flash devices.
Each bank contains up to 5 NAND Flash connected in parallel for a total of 20 NAND Flash devices.
Simple user interface designed for easy on-chip integration.
Options to provide PCI, AMBA AHB, PCMCIA, Cardbus or CompactFlash bus interface.
Large Flash memory space can be accessed using data and index register method.
Programmable access timing, NAND Flash size, data width and number of banks.
Supports large block and small block NAND Flash devices.
User has full access to spare data in NAND Flash device.
Optional single-bit correction double bit detection error correction code (ECC).
Option to apply ECC protection on per word or per page basis.
Error logging with ECC correction and detection.
Interrupt generation based on ECC error.
Designed for ASIC and FPGA implementations.
Fully static design with edge-triggered flip-flops."

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