Poll

What is your preferred platform for FPGA Design Flow ?:

Discrete Wavelet Transform

IP Vendor: 
Barco-Silex
IP Target Vendor: 
Xilinx
IP Type: 
Design
IP Category: 
Audio, Video and Image Processing
IP Supported FPGA Device: 
Spartan-3
Virtex-II
Virtex-II Pro
IP Description: 

"The BA113FDWT IP core performs hardware 2D multi-level Discrete Wavelet Transform in either lossless or lossy mode with full compatibility with JPEG2000 Standard (ISO/IEC 15444-1). The core is optimized for speed and is suited for high-end applications involving real-time video (e.g. SDTV or more). It features a 16-bit datapath and is able to decompose tiles of size up to 128 by 128 pixels into up to 5 levels of decomposition.

Device Family Support
# Virtex-II Pro
# Virtex-II
# Spartan-3

Key Features
# Compliant with ISO/IEC 15444-1 Information Technology: JPEG2000 Image Coding System
# 2D decomposition with programmable number of decomposition levels from 0 (bypass) up to 5
# Programmable lossless integer 5/3 or lossy floating point 9/7 filter
# Periodic symmetric border extension (according to JPEG2000 Standard)
# Compact lifting scheme architecture with successive vertical and horizontal 1D decompositions
# 16-bit datapath; fixed point 9/7 approximation
# Fully configurable tile size from 1 by 1 to up to 128 by 128; configurable tile offset"

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