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DFPAU: Floating Point Arithmetic Unit

IP Vendor: 
Digital Core Design
IP Target Vendor: 
Lattice
IP Type: 
Design
IP Category: 
DSP - Digital Signal Processing
IP Description: 

Features

Direct replacement for C float software functions such as: +, -, *, /,==, !=, >=, <=, <, >
C interface supplied for all popular compilers: GNU C/C++, 8051 compilers
No programming required
IEEE-754 Single precision real format support - float type
Flexible arguments and result registers location
Performs the following functions:
FADD, FSUB - addition, subtraction
FMUL, FDIV - multiplication, division
FSQRT - square root
FCHS, FABS - change of sign, absolute value
FXAM - examine input data
FUCOM - comparison
Exceptions built-in routines
Masks each exception indicator:
Precision lack PE
Underflow result UE
Overflow result OE
Invalid operand IE
Division by zero ZE
Denormal operand DE
Fully configurable
Fully synthesizable, static synchronous design with no internal tri-states
Applications
Math coprocessors
DSP algorithms
Embedded arithmetic coprocessor
Data processing & control"

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