Poll

What is your preferred platform for FPGA Design Flow ?
Windows
54%
Linux
37%
Solaris
1%
Mixed
3%
Other
1%
No preference
4%
Total votes: 3983

SPI Master BFM

IP Vendor: 
Develeast
IP Code Language: 
VHDL
IP Type: 
Verification
IP Category: 
Bus Interface and IO
IP Description: 

KEY FEATURES:
- Compliant to SPI Standard (Motorola's M68HC11 Reference Manual)
- Configurable data rate
- Configurable phase, polarity and word size
- Configurable number of slaves (Slave Select)
- Simple interface to user's logic
- Technology independent (can be used with any simulation tool)

Facebook  Twitter  Linkedin  Orkut  YouTube      RSS

 

Check out FPGA related videos

Find Us On Facebook