Poll

What is your preferred platform for FPGA Design Flow ?:

MPC55xx External Bus Interface BFM

IP Vendor: 
Develeast
IP Code Language: 
VHDL
IP Type: 
Verification
IP Category: 
Bus Interface and IO
IP Description: 

KEY FEATURES:
- Support for all operating frequencies
- Fully user programmable (through MCR, BRx, ORx and ECCR registers)
- Integrated Timing Checks (setup and hold)
- Integrated Timing Delays (clock to output)
- Simple interface (call to procedures/functions)
- Behavioral design (increased simulation speed)

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