Deframer, STM0/OC1, STM1/OC3, STM4/OC12

"Aliathon's STM0/1/4 (OC1/3/12) Deframer core provides a flexible, resource-efficient solution for SDH interfacing. It caters for both concatenated payloads, such as VC4-4c over STM4, and channelised applications, such as multiple VC3s over STM1. The core may be connected to other Aliathon cores to implement complete SDH/PDH solutions.

Device Family Support

Virtex-4 FX

Virtex-4 LX

Virtex-4 SX

Virtex-II Pro

Virtex-II

Spartan-3

Key Features

Detects and aligns to the SDH framing pattern.

Performs frame synchronisation for STM0, STM1 and STM4, and generates LOS, OOF and LOF alarms. The core may be dynamically switched between SDH rates.

Descrambles the SDH frame, extracts Regenerator Section Overhead, and detects B1 errors.

Extracts Multiplex Section Overhead and detects B2 errors.

Processes all AU pointers.

Extracts VC3, VC4 and VC4-4c, both channelised and single-channel. All legal combinations of VCs are supported.

Detects B3 errors for all VCs and extracts Higher Order Path Overhead."