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CAN Bus Controller

IP Vendor: 
Avnet
IP Type: 
Design
IP Target Vendor: 
Xilinx
IP Category: 
Bus Interface and IO
IP Supported FPGA Device : 
Spartan-IIE
Virtex
Virtex-E
Virtex-II
Virtex-II Pro
IP Description: 

"The Memec Design MC-XIL-OPB_XCAN_FIFO is an OPB compliant full CAN controller with a very small ""footprint"". It provides a transmission and a reception FIFO of configurable size including FIFO controllers. The independent clocks give maximum flexibility. The configuration registers can be fixed for the lowest resource requirements or implemented as ordinary read/write registers. Both FIFO size and configuration register behaviour can be defined via generics. The RX and TX interrupts allow an efficient message handling. In addition the definition files for use in MDK/EDK are also availab

Device Family Support
# Virtex-II Pro
# Virtex-II
# Virtex-E
# Virtex
# Spartan-3
# Spartan-IIE
# Spartan

Key Features
# Conforms to International Standard ISO/IEC 12989-1 and CAN 2.0B
# CoreConnect (OPB) compliant interface
# Independent clocks for OPB and XCAN
# RX/TX FIFO controller and configurable FIFO size
# 1 Mbps bitrate"

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