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C1394A: IEEE-1394a Link Layer Controller Core

IP Vendor: 
CAST, Inc.
IP Target Vendor: 
Lattice
IP Type: 
Design
IP Category: 
Communication and Networking
IP Description: 

"Features
Conforms to and implements all functionality of the IEEE 1394-1995 and IEEE 1394a-2000 standardst
Based on Texas Instruments TSB12LV32 General Purpose Link Layer controller
Supports device data transmission of 400, 200 and 100 Mbps
Includes 32-bit AMBA APB Slave microprocessor interface (other standard interfaces available)
Fast, direct, 16-bit Data Mover interface supervises data flow to and from the external source
Integrated receive and transmit FIFOs are configurable in size
Validates data with 32-bit CRC generation for transmission and 32-bit CRC checking on reception
Capable of Bus Manager, Isochronous Resource Manager and Cycle Master modes
Able to receive all incoming isochronous traffic, and supports hardware filtering/acceptance for up to two (more available upon request)
Supports IEEE 1394 acceleration enhancement methods and the selective enabling/disabling of IEEE 1394a functions
Supports the multi-speed concatenation and fairness protocol
Uses Annex J standard to interface with any compliant PHY
Dedicated software functions support all basic operations
Additional software functions available as extra options for IEEE-1394a compliant Transaction Layer and Serial Bus Management (SBM)
All software functions are pre-pared in C language for easy use with any processor
Debug feature introduces CRC errors during transmission
Optional System-On-Chip simulation support provides a working physical layer and emulates traffic and other nodes on the bus
FPGA-proven, and offering competitive implementation results, e.g., 38,800 ASIC gates and 111 MHz host frequency"

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