Poll
2.5G OTN (OTU1) with FEC
Avalon's Columbia product combines an OTU1 Framer with ODU1/OPU1 overhead processing and an interface to optical transceivers. Customers have choice of G.709 FEC or a variety of Enhanced FEC algorithms. The Columbia core can be customized per user requirements or combined with other IP cores from Avalon to form a complete FPGA based solution.
Avalon's Columbia product combines an OTU1 Framer with ODU1/OPU1 overhead processing and an interface to optical transceivers. Customers have choice of G.709 FEC or a variety of Enhanced FEC algorithms. The Columbia core can be customized per user requirements or combined with other IP cores from Avalon to form a complete FPGA based solution.
Check out FPGA related videos
Find Us On Facebook
FPGA Central is a website bringing the FPGA (Field Programable Gate Array), CPLD , PLD, VLSI community together at one central location. Some Keywords: FGPA, FPGA, EDA Tools, FPGA Design, Central, Programmable logic, LUT, VLSI, SoC, Journal
Privacy Policy || Terms of Use
 |
 |