Poll

What is your preferred platform for FPGA Design Flow ?
Windows
55%
Linux
36%
Solaris
1%
Mixed
2%
Other
1%
No preference
4%
Total votes: 4783

ATA-4 Host Controller

IP Target Vendor: 
Altera
IP Type: 
Design
IP Category: 
Storage, NAS and SAN
IP Supported FPGA Device: 
Cyclone
Stratix
IP Description: 

"Features
ATA/ATAPI-4 standard compliant host
UDMA-33 transfer speed capabilities (33 Mbps maximum transfer speed)
Receive and Transmit FIFO buffers for data transfer through the core
Direct memory access / ultra direct memory access (DMA/UDMA) and parallel I/O (PIO) data transfers supported
Dedicated signal for polling advanced technology attachment (ATA)-device status
Dedicated signal for executing Software Reset command
Two clock domains: Core Clock and System Clock
Dedicated system side input bus for writing data to the ATA device
Dedicated system side output bus for data read from the ATA device
Required core clock speed: 100 MHz
Available PIO modes: 0 and 4
Number of ATA devices supported on the integrated drive electronics (IDE) bus: 1

Description
The ATA-4 / UDMA-33 IDE Core is a drop-in ATA-Host intellectual property (IP) core used for interfacing to an ATA-device. It handles all transactions on the IDE bus for various commands that are dispatched from the system. After a command is dispatched, the ATA-core executes the command on the ATA device. Once the command execution is completed, the final status is reported to the system side. At that time, the system can execute a new command."

Facebook  Twitter  Linkedin  YouTube      RSS

 

Check out FPGA related videos

Find Us On Facebook