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ASI

IP Vendor: 
Altera
IP Target Vendor: 
Altera
IP Type: 
Design
IP Category: 
Audio, Video and Image Processing
IP Supported FPGA Device: 
Cyclone
Cyclone II
Cyclone III
Stratix
Stratix GX
Stratix II
Stratix II GX
Stratix III
IP Description: 

"Features
270 megabits per second (Mbps) performance
Supports all Stratix® and Cyclone series devices
Easy-to-use IP Toolbench interface
Intellectual property (IP) functional simulation models for use in Altera-supported VHDL and Verilog HDL simulators
Support for OpenCore Plus evaluation
General Description
The ASI MegaCore® function implements a receiver or transmitter digital video broadcast asynchronous serial interface (DVB-ASI) that transports MPEG-2 packets over copper-based cables or optical networks. DVB-ASI is used as a serial link between equipment in broadcast facilities.

The ASI MegaCore function demonstrates how to transmit or receive packets over an ASI. The ASI MegaCore function works with 270 megabits per second (Mbps) DVB-ASI, as defined by the DVB-ASI specification EN 50083-9 from CENELEC / December 2002 “Cable networks for television signals, sound signals and interactive services. Part 9: Interfaces for CATV/SMATV head-ends and similar professional equipment for DVB/MPEG2 transport streams.”"

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