Poll
What is your preferred platform for FPGA Design Flow ?
Windows
54%
Linux
37%
Solaris
1%
Mixed
3%
Other
1%
No preference
4%
Total votes: 3278
AES Encryption
IP Vendor:
CAST, Inc.
IP Target Vendor:
Xilinx
IP Type:
Design
IP Category:
Communication and Networking IP Supported FPGA Device:
Spartan-3
Spartan-IIE
Virtex
Virtex-E
Virtex-II
Virtex-II Pro
IP Description:
"The CAST AES Encryption core is a full hardware implementation of the AES algorithm as described in the NIST's released documentation, suitable for a variety of applications. The algorithm offers strong and secure encryption with the added flexibility of variable key sizes.
Device Family Support
Virtex-II Pro
Virtex-II
Virtex-E
Virtex
Spartan-3
Spartan-IIE
Key Features
Supports ECB, OFB, CFB, CBC modes
Supports 128-, 192-, and 256-bit keys"








