Poll

What is your preferred platform for FPGA Design Flow ?:

Adder/Subtracter

IP Vendor: 
Xilinx
IP Target Vendor: 
Xilinx
IP Type: 
Design
IP Category: 
Math
IP Supported FPGA Device: 
Spartan-3
Spartan-3E
Spartan-II
Spartan-IIE
Virtex
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-E
Virtex-II
Virtex-II Pro
IP Description: 

"The Adder/Subtracter IP core creates adders, subtracters, and adders/subtracters that operate on signed or unsigned data. The product supports inputs ranging from 1 to 64 bits wide and outputs ranging from 1 to 66 bits wide.
Included with Xilinx ISE Software

Device Family Support

Virtex-4 FX

Virtex-4 LX

Virtex-4 SX

Virtex-II Pro

Virtex-II

Virtex-E

Virtex

Spartan-3E

Spartan-3

Spartan-IIE

Spartan-II"

Facebook  Twitter  Linkedin  YouTube      RSS

 

Find Us On Facebook