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"Features
Optimized for APEX™ 20KC and APEX II architectures
Combined fixed-point 2D DCT/IDCT core
Row column decomposition method (RCM)
Compatible with JPEG, H.263, and MPEG standards
IDCT compliant to IEEE 1180-1990 number precision standard
9-bit signed (2's complement) pixel interface
12-bit signed (2's complement) transformed coefficient interface
Deeply optimized architecture with small LE count
One pixel per clock cycle throughput
Continuous pipeline decoding across multiple consecutive blocks until end-of-data signaling
Fully synchronous design with single clock
Integrated dual-port 64 x 22 synchronous SRAM for block transposition
Fully RTL design
Simple synchronous strobe-acknowledge pixel and transformed coefficient interfaces
End-of-image and end-of-scan support for easy integration in JPEG chains

Description
The bidirectional DCT/IDCT IP core performs high-speed 2D discrete cosine transform and inverse discrete cosine transform, dealing with 9-bit signed pixels and 12-bit signed transformed coefficients. This IP core efficiently decomposes 2D transforms into two consecutive 1D transforms with an effective 1-pixel per clock cycle throughput.

This IP core's internal arithmetic architecture has been tuned to meet the requirements of the IEEE 1180-1990 number precision standard with the smallest core area, allowing you to use this IP core for JPEG, H.263, and MPEG applications. This IP core features 12-bit unsigned cosine coefficients and 22-bit transpose memory.

With its simple synchronous interfaces and 100% synchronous structure, you can integrate this IP core in a complex system with little effort."