"The 2-D Discrete Cosine Transform (DCT) IP core is an 8-point 2-D Forward and Inverse DCT module. The core does not require power-on initialization. It supports signed and unsigned 8 to 24-bit input data and exploits coefficient symmetry to produce extremely compact implementations. The core enables the user to specify the degree of parallelism and tradeoff FPGA logic resources for sample rate, in order to generate an optimal design. It uses a data-flow style for the core interface and control.
Device Family Support
# Virtex-II Pro
# Virtex-II
# Virtex-E
# Virtex
# Spartan-IIE"