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1394 Link Layer Controller

IP Type:
Design
IP Target Vendor:
Xilinx
IP Category:
Bus Interface and IO
IP Supported FPGA Device :
Spartan-3
Virtex-4 FX
Virtex-4 LX
Virtex-4 SX
Virtex-II Pro
IP Description:

"The SI16FW10, 1394 Link Layer Controller Core provides data packet delivery service for asynchronous and isochronous (real-time) data transmission. It performs arbitration request, packet generation and checking as well as data and acknowledgement transmission. Silicon Interfaces’ link layer controller core also provides complete support for bus Cycle Master and cycle control operation. SI16FW10 is designed to support 100, 200 and 400 Mbps transmission, when used with the appropriate external physical layer device.

Device Family Support

Virtex-4 FX

Virtex-4 LX

Virtex-4 SX

Virtex-II Pro

Spartan-3L

Spartan-3

Key Features

Fully compliant with IEEE 1394-1995 standards

32-bit Generic Host Bus Interface

Supports 100, 200 and 400 Mbps bus rates

Half-Duplex Independent Transmit and Receive Data Path Controlled by Rx Tx Controller

Supports Asynchronous, Isochronous and Cycle Start packet Transmit and Receive

Cycle Master Capable

Single Clock Domain throughout the system"

Average rating
(1 vote)

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