Poll

What is your preferred platform for FPGA Design Flow ?:

G.709 Forward Error Correction (FEC)

IP Type: 
Design
IP Description: 

Compliant to G.709, G.983, and G.984 standards, this FEC is suitable for a variety of applications and speeds ranging from 2.5G to 40G and above.

Compliant to G.709, G.983, and G.984 standards, this FEC is suitable for a variety of applications and speeds ranging from 2.5G to 40G and above.

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