Change you domain to VLSI Design Engineering.. Hurry-up..

Hi Friends,

 Cadence And University of California offering....

Certificate Program in VLSI Logic Design and Layout Design Engineering.
TIIT (TTM Institute of Information Technology) in collaboration with
the University Of California at Santa Cruz Extension in the
Valley and Cadence Design Systems offers a certificate program in VLSI
design engineering. Students who complete the required courses with
minimum grade point average (GPA) will be awarded a certificate in
VLSI design engineering (Physical Design or Logic Design) from the
University Of California Santa Cruz extension in Silicon Valley.

Duration: Will be for 20 weeks.

Class Timings: Classes will be during the weekends; 6 days Lab will be
open to work on Tools (morning 6am to 12 in the midnight).

Fees: 90k for Layout Design Course. 70k for Logic Design Course.

Payment Flexibility: Can pay it in 3 Installments.

Placement Statistics: 90% of the people got employed in VLSI Industry
so far.

Batch Start Date: Week-end Batch: 22nd December 2007. 

If you are looking for Final year M.Tech VLSI Live Project mail to [email protected] 

Registration: Or send mail to [email protected]

Hurry-up, We have limited seats for December Week-end batch

TIIT Pvt Ltd.
#18, 1st floor, Palavalli plaza
100 feet Ring road.
2nd stage BTM Layout,
Karnataka,India.’ &
Tel: +91-80-26789654.

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