Bram Access on FPGA

Hi,

I am testing a piece of hardware on ML-561(Virtex5).

I plan to provide the inputs from a bram pre-loaded with the input cases and the outputs will be written to another bram. I want to read the output data stored in that bram to my PC using Xilinx ISE10.1. How can I do that?

Please help.

Thank you.

Shamanth.