FPGA Design Assurance Workshop (with DO-254 Considerations) - Milano, Italy

A growing number of safety - and mission-critical systems make extensive use of FPGA designs. These same FPGAs are also growing in complexity. Many companies are failing to deliver these complex devices predictably, and with sufficient quality. Others are struggling to do so profitably. Both profitability and quality usually tie directly back to the design process itself. Most companies find that they do not have a structured, repeatable process that enables them to confidently deliver a high-quality, FPGA end-product.

FPGAs are an amazing invention. They enable designers to take an idea into silicon very quickly. The problem with complex FPGA devices is that haste, and ad-hoc process, do not always align with the goals of design assurance. This has caused much concern in various high assurance design sectors and has resulted in numerous design and process assurance standards, such as DO-254, CMMI, or any of the various other safety-critical design standards recently being developed and enforced.

What You Will Learn

This hands-on, one-day workshop will cover the basic principles of a structured FPGA design process that is geared towards delivering both efficiency and a high-quality end product. The session discusses how modern design methods and tools support a structured design process (including certain requirements of DO-254). It also demonstrates this by taking an example design through pre-design activities (planning, conceptual design, requirements management), detailed design (RTL coding/checking, synthesis, P&R), verification (simulation, CDC checking, logical equivalency checking), and a late stage requirements change that impacts the entire flow.

Whether you already have a good process and are open to incremental improvements, or you need an entire process overhaul, this workshop is for you.

* Planning and establishing a structured, repeatable design flow
* Managing and tracing requirements to project design and verification activities
* RTL coding for quality and design reuse
* Synthesis, with design assurance as a priority
* Incremental improvements to any verification process (including code coverage, clock-domain crossing, and equivalency checking)
* Key DO-254 considerations and how they are applied in the context of a structured FPGA process