
How you can start using assertion based verification without costly simulation upgrades. Many FPGA designers avoid assertions because they are not familiar with them, believe assertions are too difficult to learn or too expensive to implement. We will explain the ideas of properties, assertions and coverage using real design examples. In conclusion, we will prove that assertions are affordable and easy-to-learn, bringing high value to any design. This webinar includes a presentation and design demonstrations using Aldec tools.
Agenda:
• Assertion Basics
• Assertion Languages
• Why Use Assertions?
• Real Design Examples
• Assertions in Aldec Tools