Can you design Virtex-5, Stratix® III and today's other high performance FPGAs in a predictable manner that gets your company's products to market on time? Without good habits to help you create correct, portable designs and tools that enable you to reach your design and project budgets, you could jeopardize your company's business objectives.
This workshop will teach you 7 habits that will make it possible for you to design FPGAs to meet all of your FPGA design goals while using Mentor Graphics' Precision® Synthesis. Precision is optimized for all complex FPGA architectures and utilizes sophisticated RTL and physical optimization algorithms to minimize the number of design spins needed to obtain your final complete design.
Time:
* 9:00 a.m. - 2:00 p.m.
* 5-hour workshop, 30% presentation / 70% hands-on
Agenda:
1. Use Standard Languages and Constraints for Design Portability
2. Design for FPGA Vendor Independence
3. Code for Performance
4. Apply Comprehensive Design Constraints
5. Analyze QoR Bottlenecks
6. Optimize to Meet QoR Requirements
7. Minimize the Impact of Design Changes