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Introduction to PCIe - Dresher, PA
This ½ day hands-on workshop is designed to help engineers become familiar with the new Virtex-5 PCI Express Block from Xilinx. The presentation will cover PCIe basics, Xilinx PCIe Endpoint Block Plus v1.4 LogiCORE, Model Sim overview/tool enhancements, PCIe simulation and customizing the core. The labs will utilize the Xilinx CoreGen and ISE tools and be downloaded to the Xilinx ML555 Development kit.
Agenda:
* Introduction
* PCIe and End Point Overview
* Lab 1 -- PCI Express Endpoint Block Plus 1.4 LogiCORE
* ModelSim: Overview and 6.3 Tools Update
* Lab 2 -- Simulating with the PCI Express Endpoint Block
* Lab 3 -- Implementing the PCI Express Endpoint Block
* Lab 4 -- Installing and Running the Memory Endpoint Test Application
* System Considerations – Memory/Signal Integrity
* Memory overview and MIG introduction
* NorthWest Logic DMA Demo
* Hyperlynx Overview
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