World's 1st FPGA/CPLD Portal

Day 1: Technical Tutorial – Synplify Pro
This course first
introduces the Synplify Pro tool. The course will familiarize students
with the FPGA design flow utilizing features of the Synplify Pro
product, enabling them to actively create designs using the Synplify
Pro product. The course then expands on these concepts to focus on
complex design techniques, debugging and high performance design.  All
topics covered in this course will aid the student for day 2 – ESL
Synthesis Tutorial for DSP Algorithm Implementation.

Day 2: Technical Tutorial – ESL Synthesis Tutorial for DSP Algorithm Implementation
New tools for implementing DSP algorithms into FPGAs and ASICs are
making it much faster and easier to go from high level models into
silicon, including the ability to perform architectural exploration and
evaluate speed and area tradeoffs quickly.  This session provides a
tutorial on using Synplify DSP, how some of the commmonly used
optimizations work and how they can be applied automatically to
high-level algorithm models built with Synplicity's Synplify DSP
library and Mathworks Simulink. The seminar will include examples in
wireless communications and will benefit engineers who are interested
in:

• Methods to rapidly create implementable aglorithm models
• Architectural exploration and analysis
• Creating portable algorithmic IP that are re-usable across FPGA and ASIC technologies