World's 1st FPGA/CPLD Portal

The day will be launched with an opening address delivered jointly
by Altera and Mentor Graphics including an executive level discussion
of the latest in FPGA technology and the impact on design and the
ultimate impact on product profit margin.

Delegates will contribute to informal, round-table, breakout
discussions focused on how FPGA on Board issues are tackled in their
organisation. Delegates will learn best practices, glean new ideas and
identify costly pitfalls to avoid.

The day will be complemented with technical presentations of
available solutions by specialists from Mentor's System Design Divison
and delegates will have a great opportunity for a hands-on workshop to
experience an automated approach to leading edge interface design
requirements.

Agenda

• 0900 - Registration
• 0930 - Welcome and introduction
• 0940 - Opening address delivered jointly by Altera and Mentor Graphics
• 1010 - Roundtable discussions
  "Real life FPGA on Board
  design and process challenges". The delegates will split into groups of
  approximately 8 people to discuss real life challenges of FPGA on
  Board.
  Groups will have a pre-arranged leader from an industrial design team.
• 1110 - Morning break
• 1125 - Discussion feedback
• 1200 - Lunch
• 1300 - Leading edge FPGA-on-Board solutions, Bob Potock, Product Director, System Design Division, Mentor Graphics Corporation
• 1345 - I/O Designer user experience
• 1400 - Hands-on workshop : automated approach to interface design
• 1500 - Close