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Power Implications of Implementing Logic Using FPGA Embedded Memory Blocks
September 10, 2008 - 4:03pm — scottcOn-chip user memory has become a common resource on modern FPGAs. This memory comes in the form of configurable Embedded Memory Blocks (EMB). EMBs are very area efficient for implementing designs
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- XplosiveStocks.com: Xilinx Inc. (Nasdaq: XLNX) Hot Stock on the Move! - Trading Markets (press release)
- Evaluation kit aids FlexRay application development - EE Times India
- Labview Graphical Programming Software from National Instruments - Ferret
- NI Programmable Automation Controllers - Ferret
- Intel, M'soft launch parallel lab - EETimes.com
RAW 2008 - 15th Reconfigurable Architectures Workshop - Miami, FL
The 15th Reconfigurable Architectures Workshop (RAW 2008) will be held in Miami, Florida, in April 2008. RAW 2008 is associated with the 22nd Annual International Parallel & Distributed Processing Symposium (IPDPS 2008) and is sponsored by the IEEE Computers Society's Technical Committee on Parallel Processing. The workshop is one of the major meetings for researchers to present ideas, results, and on-going research on both theoretical and practical advances in Reconfigurable Computing.
Main Focus of the Workshop:
Run-Time Reconfiguration & Adaptive Computing: Architectures, Algorithms, Technologies
Run-Time and Dynamic Reconfiguration are characterized by the ability of underlying hardware architectures or devices to rapidly alter (on the fly) the functionalities of its components and the interconnection between them to suit the problem. Key to this ability is reconfiguration handling and speed. Though theoretical models and algorithms for them have established reconfiguration as a very powerful computing paradigm, practical considerations make these models difficult to realize. On the other hand, commercially available devices (such as FPGAs and new coarse-/multi-grain devices) appear to have more room for exploiting run-time reconfiguration (RTR). An appropriate mix of the theoretical foundations of dynamic reconfiguration, and practical considerations, including architectures, technologies and tools supporting RTR is essential to fully reveal and exploit the possibilities created by this powerful computing paradigm. RAW 2008 aims to provide a forum for creative and productive interaction between all these disciplines.
FPGA Webcasts
Upcoming FPGA Events
- 2008 International Conference on ReConFigurable Computing and FPGAs (ReConFig'08) - Cancun, Mexico(Event or Conference)(1 day)
- SYSTEM VERILOG ASSERTIONS :: METHODOLOGY AND LANGUAGE TRAINING(Event or Conference)(2 days)
- SystemVerilog Assertions Language and Methodology Overview Seminar (Event or Conference)(14 days)
