International Symposium on VLSI Design Automation and Test (VLSI-DAT 2008) - Hsinchu, Taiwan
The conference program will cover a half-day tutorial and 2.5 days technical sessions including a plenary session and an invited industrial session. A number of invited speakers will share their up-to-date research results.
The conference is proud to create a platform for technical exchanges and communications shared by experts from all over the world. The purpose is to bring together scientists and engineers actively engaged in research, development, and manufacturing on VLSI Design, Automation and test to discuss current progress in this field.
| Time | Apr. 23, Wednesday |
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| Ballroom B |
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| 9:00 ~ 9:20 | Opening | ||
| 9:20 ~ 12:10 | Plenary Session : Keynote Speeches |
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| 12:10 ~ 13:30 | Lunch | ||
|  | Ballroom A |
Ballroom B |
|
| 13:30 ~ 15:00 |
Session W1A |
Industry Session : Solutions for advanced SoC/IP - design, testing, and power estimation |
|
| 15:00 ~ 15:20 |
Break |
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| 15:20 ~ 17:00 | Session W2A : LNA and Receiver |
Industry Session : Solutions for advanced SoC/IP - design, testing, and power estimation |
|
| 18:00 ~ 20:00 | DAT Cocktail Reception (Ballroom D) |
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| Time | Apr. 24, Thursday |
 | |
| Ballroom A |
Ballroom B |
Ballroom C |
|
| 9:00 ~ 10:30 | Session T1A : Video System IC Design |
Session T1B : Testing/DFT (I) |
 |
| 10:30 ~ 10:50 | Break | 10:30 ~ 13:30 Poster Session |
|
| 10:50 ~ 12:30 | Session T2A : Digital Circuit |
Session T2B :
Testing/DFT |
|
| 12:30 ~ 13:30 | Lunch | ||
| 13:30 ~ 15:10 | Session T3A : PLL & CDR |
Session T3B : SoC Design & Methodology |
 |
| 15:10 ~ 15:30 | Break | ||
| 15:30 ~ 17:10 | Session T4A :
Analog |
Session T4B : High Level Synthesis and Logic Synthesis for Power & Area Optimization |
|
| Time | Apr. 25, Friday |
 | |
| Ballroom A |
Ballroom B |
Ballroom C | |
| 9:00 ~ 10:30 | Session F1A : ADC and Analog Design |
Session F1B :
Communication IC Design |
 |
| 10:30 ~ 10:50 | Break | ||
| 10:50 ~ 12:30 | Session F2A : Filter & Power Divider |
Session F2B : Error Correction IP Design |
|
| 12:30 ~ 13:30 | Lunch | ||
| 13:30 ~ 16:30 | Tutorial I (Ballroom A) : ESL Standards and Design Methodology |
Tutorial II (Ballroom B) :
Testing & Debugging of Circuit Marginality Problems |
Tutorial III (Ballroom C) : CMOS Microwave and Millimeter-wave Circuit Designs |
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