Poll

What is your preferred platform for FPGA Design Flow ?:

System Generator for DSP

system_gen_dsp100.jpe
EDA Tool Vendor: 
Xilinx

System Generator for DSP is the industry’s leading high-level tool for designing high-performance DSP systems using FPGAs. The tool provides abstractions that enable you to develop highly parallel systems with the industry’s most advanced FPGAs, providing system modeling and automatic code generation from Simulink® and MATLAB® (The MathWorks, Inc.). System Generator is a key component of the Xilinx XtremeDSP™ solution that combines state-of-the-art FPGAs, design tools, intellectual property cores, and partnerships, as well as design and educational services.

Device Family Support
Spartanâ„¢-3A DSP
Spartan-3A, AN
Spartan-3
Spartan-II, IIE
Virtexâ„¢-5
Virtex-4
Virtex-II Pro
Virtex-II
Virtex-E

EDA Tool Category: 
DSP
EDA Tool Platform: 
Windows XP

Key Features:-
(1) DSP modeling - Build and debug high-performance DSP systems in Simulink using the Xilinx Blockset that contains functions for signal processing (e.g., FIR filters, FFTs), error correction (e.g., Viterbi decoder, Reed-Solomon encoder/decoder), arithmetic, memories (e.g., FIFO, RAM, ROM), and digital logic.
(2) Automatic code generation of VHDL or Verilog from Simulink. Implement behavioral (RTL) generation and target specific Xilinx IP cores from the Xilinx Blockset.
(3) Hardware co-simulation. Create an “FPGA-in-the-loop” simulation target: a code generation option that allows you to validate working hardware and accelerate simulations in Simulink and MATLAB. System Generator supports Ethernet (10/100/Gigabit), PCI, Cardbus, and JTAG communication between a hardware platform and Simulink.
(4) Hardware / software co-design of embedded systems. Build and debug DSP co-processors for the Xilinx MicroBlazeâ„¢ 32-bit RISC processor. System Generator provides a shared memory abstraction of the HW/SW interface, automatically generating the DSP co-processor, the bus interface logic, software drivers, and software documentation for using the co-processor.

Facebook  Twitter  Linkedin  YouTube      RSS

 

Check out FPGA related videos

Find Us On Facebook