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The Student's Guide to VHDL is a condensed edition of The Designer's Guide to VHDL, the
most widely used textbook on VHDL for digital system modeling. The Student's Guide is targeted
as a supplemental reference book for Computer Organization and Digital Design courses.
Since publication of the first edition of The Student's Guide, the IEEE VHDL and related standards
have been revised. The Designer's Guide has been revised to reflect the changes, so it is
appropriate that The Student's Guide also be revised.
In The Student's Guide to VHDL, 2nd Edition (SG2E), we plan to include a design case study
illustrating an FPGA-based design flow. The aim is to show how VHDL modelling fits into a
design flow, starting from high-level design and proceeding through detailed design and verification,
synthesis, FPGA place and route, and final timing verification.
Inclusion of the case study will better serve the educational market. Currently, most college
courses do not formally address the details of design flow. Students may be given informal guidance
on how to proceed with lab projects. In many cases, it is left to students to work it out for
themselves. The case study in SG2E will provide a reference design flow that can be adapted to
a variety of lab projects.