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 <title>FPGA Central - Events Feed</title>
 <link>http://www.fpgacentral.com/event/feed</link>
 <description>July 20, 2008 - August 19, 2008</description>
 <language>en</language>
<item>
 <title>Advanced Debugging with ModelSim Seminar - Woodland Hills, California </title>
 <link>http://www.fpgacentral.com/fpga-event/2008/jul/advanced-debugging-with-modelsim-seminar/arrow-electronics-components-20935-warn</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Jul 22 2008 - 10:00am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Jul 22 2008 - 1:00pm&lt;/div&gt;
&lt;p&gt;Designing today’s powerful products put stress on verification environments.  ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity.&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/2008/jul/advanced-debugging-with-modelsim-seminar/arrow-electronics-components-20935-warn#comments</comments>
 <pubDate>Thu, 10 Jul 2008 18:40:45 -0400</pubDate>
</item>
<item>
 <title>Advanced Debugging with ModelSim Seminar - Irvine, CA</title>
 <link>http://www.fpgacentral.com/fpga-event/2008/jul/advanced-debugging-with-modelsim-seminar/mentor-graphics-2-venture-plaza-suite-3</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Jul 23 2008 - 10:00am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Jul 23 2008 - 1:00pm&lt;/div&gt;
&lt;p&gt;Designing today’s powerful products put stress on verification environments.  ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity.&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/2008/jul/advanced-debugging-with-modelsim-seminar/mentor-graphics-2-venture-plaza-suite-3#comments</comments>
 <pubDate>Thu, 10 Jul 2008 18:45:03 -0400</pubDate>
</item>
<item>
 <title>Advanced Debugging with ModelSim Seminar - San Diego</title>
 <link>http://www.fpgacentral.com/fpga-event/2008/jul/advanced-debugging-with-modelsim-seminar/mentor-graphics-12275-el-camino-real-su</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Jul 24 2008 - 10:00am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Jul 24 2008 - 1:00pm&lt;/div&gt;
&lt;p&gt;Designing today’s powerful products put stress on verification environments.  ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity.&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/2008/jul/advanced-debugging-with-modelsim-seminar/mentor-graphics-12275-el-camino-real-su#comments</comments>
 <pubDate>Thu, 10 Jul 2008 18:48:31 -0400</pubDate>
</item>
<item>
 <title>AVMS VI-03: Preview of VHDL 4.0</title>
 <link>http://www.fpgacentral.com/fpga-event/%5Beventyyyy%5D/%5Beventmon%5D/avms-vi-03-preview-vhdl-40/%5Bfield_event_location%5D</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Jul 24 2008 - 11:00am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Jul 24 2008 - 12:00pm&lt;/div&gt;
&lt;p&gt;Presenter: Aldec&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/%5Beventyyyy%5D/%5Beventmon%5D/avms-vi-03-preview-vhdl-40/%5Bfield_event_location%5D#comments</comments>
 <pubDate>Fri, 27 Jun 2008 11:31:11 -0400</pubDate>
</item>
<item>
 <title>Embedded Systems -Comprehensive Analysis and Design - Bangalore, India</title>
 <link>http://www.fpgacentral.com/fpga-event/2008/jul/embedded-systems-comprehensive-analysis-/m-s-ramaiah-school-advanced-studies-ban</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Jul 28 2008 - 9:30am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Jul 30 2008 - 5:30pm&lt;/div&gt;
&lt;p&gt;An Embedded system is a special-purpose computer designed to perform&lt;br /&gt;
one or a few dedicated tasks, often with real-time computing&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/2008/jul/embedded-systems-comprehensive-analysis-/m-s-ramaiah-school-advanced-studies-ban#comments</comments>
 <pubDate>Thu, 10 Jul 2008 17:44:00 -0400</pubDate>
</item>
<item>
 <title>NetFPGA Summer Camp - Santa Clara, CA</title>
 <link>http://www.fpgacentral.com/fpga-event/2008/aug/netfpga-summer-camp-santa-clara-ca/stanford-university-campus-stanford-ca</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Aug 4 2008 - 9:00am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Aug 8 2008 - 5:00pm&lt;/div&gt;
&lt;p&gt;An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems.&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/2008/aug/netfpga-summer-camp-santa-clara-ca/stanford-university-campus-stanford-ca#comments</comments>
 <pubDate>Thu, 10 Jul 2008 15:06:33 -0400</pubDate>
</item>
<item>
 <title>AVMS VI-04: Automating Testbench Tasks with Tcl</title>
 <link>http://www.fpgacentral.com/fpga-event/%5Beventyyyy%5D/%5Beventmon%5D/avms-vi-04-automating-testbench-tasks-wi/%5Bfield_event_location%5D</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Aug 7 2008 - 11:00am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Aug 7 2008 - 12:00pm&lt;/div&gt;
&lt;p&gt;Presenter: Doulos&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/%5Beventyyyy%5D/%5Beventmon%5D/avms-vi-04-automating-testbench-tasks-wi/%5Bfield_event_location%5D#comments</comments>
 <pubDate>Fri, 27 Jun 2008 11:33:11 -0400</pubDate>
</item>
<item>
 <title>AVMS VI-05: Best Practices for Quick Closure of Verilog Designs</title>
 <link>http://www.fpgacentral.com/fpga-event/%5Beventyyyy%5D/%5Beventmon%5D/avms-vi-05-best-practices-quick-closure-/%5Bfield_event_location%5D</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Aug 14 2008 - 11:00am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Aug 14 2008 - 12:00pm&lt;/div&gt;
&lt;p&gt;Presenter: Aldec&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/%5Beventyyyy%5D/%5Beventmon%5D/avms-vi-05-best-practices-quick-closure-/%5Bfield_event_location%5D#comments</comments>
 <pubDate>Fri, 27 Jun 2008 11:35:26 -0400</pubDate>
</item>
<item>
 <title>Building Gigabit-rate Routers with the NetFPGA - Seattle, WA</title>
 <link>http://www.fpgacentral.com/fpga-event/2008/aug/building-gigabit-rate-routers-with-netfp/seattle-wa</link>
 <description>&lt;div class=&quot;start&quot;&gt;Start: Aug 17 2008 - 9:00am&lt;/div&gt;
&lt;div class=&quot;end&quot;&gt;End: Aug 17 2008 - 5:00pm&lt;/div&gt;
&lt;p&gt;An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems.&lt;/p&gt;
</description>
 <comments>http://www.fpgacentral.com/fpga-event/2008/aug/building-gigabit-rate-routers-with-netfp/seattle-wa#comments</comments>
 <pubDate>Thu, 10 Jul 2008 15:11:41 -0400</pubDate>
</item>
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