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Featured Articles
Power Implications of Implementing Logic Using FPGA Embedded Memory Blocks
September 10, 2008 - 4:03pm — scottcOn-chip user memory has become a common resource on modern FPGAs. This memory comes in the form of configurable Embedded Memory Blocks (EMB). EMBs are very area efficient for implementing designs
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FPGA News
- XplosiveStocks.com: Xilinx Inc. (Nasdaq: XLNX) Hot Stock on the Move! - Trading Markets (press release)
- XplosiveStocks.com: Xilinx Inc. (Nasdaq: XLNX) Hot Stock on the Move! - Trading Markets (press release)
- Death notices -- Dec. 2 - The Olympian
- Actel and Future Electronics in distribution agreement - evertiq.se
- Evaluation kit aids FlexRay application development - EE Times India
Events - Filter:
The Reconfigurable Systems Summer Institute
(RSSI), co-organized by the National Center for Supercomputing Applications,
Presenter: Doulos
The international conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) was founded in 2001 and, since then, has been held each year in Las Vegas.
The international conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) was founded in 2001 and, since then, has been held each year in Las Vegas.
The international conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) was founded in 2001 and, since then, has been held each year in Las Vegas.
The international conference on Engineering of Reconfigurable Systems and Algorithms (ERSA) was founded in 2001 and, since then, has been held each year in Las Vegas.
Presenter: Aldec
Designing today’s powerful products put stress on verification environments. ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity.
Designing today’s powerful products put stress on verification environments. ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity.
Designing today’s powerful products put stress on verification environments. ModelSim extensive integrated support of VHDL, Verilog and SystemC provide a rich opportunity for debug productivity.
An Embedded system is a special-purpose computer designed to perform
one or a few dedicated tasks, often with real-time computing
An Embedded system is a special-purpose computer designed to perform
one or a few dedicated tasks, often with real-time computing
This event provides a forum for members of the electronic design
community to learn about Synopsys' latest technologies and
An Embedded system is a special-purpose computer designed to perform
one or a few dedicated tasks, often with real-time computing
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems.
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems.
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems.
Presenter - Ashok Mehta, DefineView Consulting
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems.
Presenter: Doulos
This quarter, we're excited to host the exclusive presentation of David Whipp's "Stop Writing Assertions! Creating Efficient Verification Methodologies".
An open platform called the NetFPGA has been developed at Stanford University. The NetFPGA platform enables researchers and instructors to build high-speed, hardware-accelerated networking systems.
FPGA Webcasts
Upcoming FPGA Events
- 2008 International Conference on ReConFigurable Computing and FPGAs (ReConFig'08) - Cancun, Mexico(Event or Conference)(1 day)
- SYSTEM VERILOG ASSERTIONS :: METHODOLOGY AND LANGUAGE TRAINING(Event or Conference)(2 days)
- SystemVerilog Assertions Language and Methodology Overview Seminar (Event or Conference)(14 days)
