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Thursday April 24, 2008
Start: 8:30 am
End: 5:00 pm

Motivated by the success of recent years, we invite you this year to the sixth ModelSim Verification User Group in Germany.

Start: 9:00 am
End: 1:30 pm

Modern FPGAs have seen tremendous advances in both performance and capacity.

Friday April 25, 2008
Tuesday April 29, 2008
Start: 8:30 am
End: 2:30 pm

The Real-Time & Embedded Computing Conference (RTECC) is a single-day conference and exhibition showcase focused for people that are developing computer systems and time-critical applications serving

Thursday May 1, 2008
Start: 8:30 am
End: 2:30 pm

The Real-Time & Embedded Computing Conference (RTECC) is a single-day conference and exhibition showcase focused for people that are developing computer systems and time-critical applications serving

Sunday May 4, 2008
Start: 1:00 pm
Start: May 4 2008 - 1:00pm
End: May 6 2008 - 5:00pm

The 18th edition of GLSVLSI will be held in Orlando, Florida. Original, unpublished papers,describing research in the general area of VLSI are solicited.

Monday May 5, 2008
(all day)
Start: May 4 2008 - 1:00pm
End: May 6 2008 - 5:00pm

The 18th edition of GLSVLSI will be held in Orlando, Florida. Original, unpublished papers,describing research in the general area of VLSI are solicited.

Tuesday May 6, 2008
End: 5:00 pm
Start: May 4 2008 - 1:00pm
End: May 6 2008 - 5:00pm

The 18th edition of GLSVLSI will be held in Orlando, Florida. Original, unpublished papers,describing research in the general area of VLSI are solicited.

Start: 8:30 am
End: 2:30 pm

The Real-Time & Embedded Computing Conference (RTECC) is a single-day conference and exhibition showcase focused for people that are developing computer systems and time-critical applications serving

Wednesday May 7, 2008
Start: 9:30 am
End: 1:30 pm

Achieving complete system verification and validation closure is among the most important challenges faced by designers and verification engineers today.

Start: 10:00 am

In order to continue innovating and succeeding, design engineers need a trusted resource for information and analysis that helps them make the correct technology decisions.

Thursday May 8, 2008
Start: 8:30 am
End: 2:30 pm

The Real-Time & Embedded Computing Conference (RTECC) is a single-day conference and exhibition showcase focused for people that are developing computer systems and time-critical applications serving

Start: 9:30 am
End: 1:30 pm

Achieving complete system verification and validation closure is among the most important challenges faced by designers and verification engineers today.

Wednesday May 14, 2008
Start: 8:30 am
Start: May 14 2008 - 8:30am
End: May 15 2008 - 3:45pm

The IET & GSA International Semiconductor Forum
includes an exhibition that promotes the expansion of global business

Start: 9:00 am
End: 5:00 pm

Program:

8:15 - 9:00
Continental breakfast and registration

9:00 - 9:45
Session 1: Interconnect Trends and Standards

Start: 10:00 am
Start: May 14 2008 - 10:00am
End: May 16 2008 - 5:00pm

ESEC is the largest embedded systems exhibtiion in Asia.

Thursday May 15, 2008
End: 3:45 pm
Start: May 14 2008 - 8:30am
End: May 15 2008 - 3:45pm

The IET & GSA International Semiconductor Forum
includes an exhibition that promotes the expansion of global business

(all day)
Start: May 14 2008 - 10:00am
End: May 16 2008 - 5:00pm

ESEC is the largest embedded systems exhibtiion in Asia.

Friday May 16, 2008
End: 5:00 pm
Start: May 14 2008 - 10:00am
End: May 16 2008 - 5:00pm

ESEC is the largest embedded systems exhibtiion in Asia.

Wednesday May 21, 2008
Start: 9:00 am
End: 2:00 pm

Can you design Virtex-5, Stratix® III and today's other high performance FPGAs in a predictable manner that gets your company's products to market on time?

Start: 11:00 am

The new Virtex®-5 FXT family of Xilinx FPGAs was developed specifically to enable integration of sophisticated embedded systems on a single, flexible and high performance platform.

Thursday May 22, 2008
Start: 9:00 am

FPGA-based prototyping is critical to ASIC verification and early software development.

Start: 9:00 am

FPGA-based prototyping is critical to ASIC verification and early software development.

Start: 9:00 am
End: 6:30 pm

Learn about intelligent spaceships in the industry keynote presentation, "Move Over HAL: Autonomous Spacecraft," presented by Dr.

Start: 11:30 am

Event description:
Speaker

Professor David Dill, Stanford University

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