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Wednesday March 12, 2008
(all day)
Start: Mar 10 2008 - 7:30am
End: Mar 14 2008 - 6:00am

Design, Automation & Test in Europe 2008 (DATE 08)

Start: 8:30 am
End: 11:30 am

Synplify DSP offers DSP hardware engineers and algorithm developers the most efficient way to get their algorithms into silicon for FPGAs and ASICs.

Start: 9:00 am
End: 2:00 pm

Spartan 3 MicroBlaze™ Workshop Course Description

Thursday March 13, 2008
(all day)
Start: Mar 10 2008 - 7:30am
End: Mar 14 2008 - 6:00am

Design, Automation & Test in Europe 2008 (DATE 08)

Start: 8:30 am
End: 5:30 pm

The one-day seminar will provide a wide range of technical presentations, covering engineering staff are most concerned about security, power, memory interface solutions, PCIe, DSP, embedded solution

Start: 9:00 am
End: 1:00 pm

This ½ day hands-on workshop is designed to help engineers become familiar with the new Virtex-5 PCI Express Block from Xilinx.

Start: 9:30 am

Workshop Highlights:

Friday March 14, 2008
End: 6:00 am
Start: Mar 10 2008 - 7:30am
End: Mar 14 2008 - 6:00am

Design, Automation & Test in Europe 2008 (DATE 08)

Start: 2:00 pm
End: 5:00 pm

This ½ day hands-on workshop is designed to help engineers become familiar with the new Virtex-5 PCI Express Block from Xilinx.

Sunday March 16, 2008
Start: 11:30 am
Start: Mar 16 2008 - 11:30am
End: Mar 18 2008 - 1:30pm

The Semico Summit
is an annual executive conference held in March in Phoenix, Arizona.

Monday March 17, 2008
(all day)
Start: Mar 16 2008 - 11:30am
End: Mar 18 2008 - 1:30pm

The Semico Summit
is an annual executive conference held in March in Phoenix, Arizona.

Start: 8:30 am

Join experts from both Mentor Graphics and Cadence to learn more about the OVM.

Start: 9:00 am
Start: Mar 17 2008 - 9:00am
End: Mar 19 2008 - 5:00pm

The International Symposium
on Quality Electronic Design (ISQED) is a leading Electronic Design

Tuesday March 18, 2008
End: 1:30 pm
Start: Mar 16 2008 - 11:30am
End: Mar 18 2008 - 1:30pm

The Semico Summit
is an annual executive conference held in March in Phoenix, Arizona.

(all day)
Start: Mar 17 2008 - 9:00am
End: Mar 19 2008 - 5:00pm

The International Symposium
on Quality Electronic Design (ISQED) is a leading Electronic Design

Start: 8:30 am
End: 5:30 pm

The one-day seminar will provide a wide range of technical presentations, covering engineering staff are most concerned about security, power, memory interface solutions, PCIe, DSP, embedded solution

Start: 9:00 am
Start: Mar 18 2008 - 9:00am
End: Mar 20 2008 - 6:00pm

SEMICON China is a major industry event providing
multiple opportunities for visitors to exchange information and network

Start: 9:00 am
End: 1:00 pm

Spartan 3 MicroBlaze™ Workshop Course Description

Start: 9:00 am

This Class will introduce you to both the Xilinx MicroBlaze and Xilinx Power-PC Embedded Processor Solutions using Xilinx Embedded Development Kit (EDK) 9.2i.

Start: 9:00 am
End: 5:00 pm

In addition to our successful seminar series for newcomers offer PLC2 Nu Horizons and now another seminar, which deals with the implementation of processors in FPGAs XILINX.

Start: 10:00 am
End: 3:00 pm

Attend this FREE hands-on workshop and find out how.

Are you designing HW accelerators for video, image processing, multimedia or wireless applications?

Wednesday March 19, 2008
End: 5:00 pm
Start: Mar 17 2008 - 9:00am
End: Mar 19 2008 - 5:00pm

The International Symposium
on Quality Electronic Design (ISQED) is a leading Electronic Design

(all day)
Start: Mar 18 2008 - 9:00am
End: Mar 20 2008 - 6:00pm

SEMICON China is a major industry event providing
multiple opportunities for visitors to exchange information and network

Start: 8:30 am
End: 2:30 pm

Join experts from both Mentor Graphics and Cadence to learn more about the OVM.

Start: 9:00 am

This one day hands-on workshop is designed to help engineers become familiar with the new Virtex-5 PCI Express Block from Xilinx.

Start: 9:00 am
End: 5:15 pm

This one-day event covers the latest technology trends, tips, and traps in using and understanding the IP blocks available from leading vendors.

Lineup of technical presenters, including:

Start: 8:30 pm

Join experts from both Mentor Graphics and Cadence to learn more about the OVM.

Thursday March 20, 2008
End: 6:00 pm
Start: Mar 18 2008 - 9:00am
End: Mar 20 2008 - 6:00pm

SEMICON China is a major industry event providing
multiple opportunities for visitors to exchange information and network

Start: 9:00 am
End: 6:30 pm

EDA Tech Forum provides technical resources for the Electronic Design community.

Start: 9:00 am
End: 3:00 pm

This course covers ISE 9.2i features, such as the Architecture Wizard and the Floorplan Editor. Other topics include design planning, implementation options, and global timing constraints.

Start: 9:00 am
End: 2:00 pm

Spartan 3 MicroBlaze™ Workshop Course Description

Start: 9:00 am

This one day hands-on workshop is designed to help engineers become familiar with the new Virtex-5 PCI Express Block from Xilinx.

Start: 9:30 am
End: 12:30 pm

This course is an introductive class of FPGA and CPLD fundamentals. There are essentially two parts in this class.

Tuesday March 25, 2008
Start: 8:30 am
End: 2:30 pm

Join experts from both Mentor Graphics and Cadence to learn more about the OVM.

Wednesday March 26, 2008
Start: 9:00 am
Start: Mar 26 2008 - 9:00am
End: Mar 28 2008 - 6:00pm

Reconfigurable computing technologies offer the promise of substantial
performance gains over traditional architectures via the customizing,

Start: 9:00 am
End: 1:00 pm

Spartan 3 MicroBlaze™ Workshop Course Description

Start: 11:30 am
End: 1:00 pm

Speaker this quarter will be
Steven Schulz, SI2.org
presenting: "Low Power Design Verification"

Start: 9:00 pm
Start: Mar 26 2008 - 9:00pm
End: Mar 28 2008 - 6:00pm

Thursday March 27, 2008
(all day)
Start: Mar 26 2008 - 9:00am
End: Mar 28 2008 - 6:00pm

Reconfigurable computing technologies offer the promise of substantial
performance gains over traditional architectures via the customizing,

(all day)
Start: Mar 26 2008 - 9:00pm
End: Mar 28 2008 - 6:00pm

Start: 8:30 am
End: 12:00 pm

This course will appeal to engineers who have an interest in developing low cost products particularly in high volume markets.

Start: 8:30 am
End: 2:30 pm

Join experts from both Mentor Graphics and Cadence to learn more about the OVM.

Start: 9:00 am
End: 3:00 pm
Start: 9:30 am

Spartan 3 MicroBlaze™ Workshop Course Description

Start: 9:30 am
End: 12:30 pm

This class is designed to help engineers who are evaluating the Virtex 5 family of FPGAs from Xilinx understand more about several of the new and improved features of the Virtex 5 family of FPGAs.

Friday March 28, 2008
End: 6:00 pm
Start: Mar 26 2008 - 9:00am
End: Mar 28 2008 - 6:00pm

Reconfigurable computing technologies offer the promise of substantial
performance gains over traditional architectures via the customizing,

End: 6:00 pm
Start: Mar 26 2008 - 9:00pm
End: Mar 28 2008 - 6:00pm

Monday March 31, 2008
Start: 7:45 am
Start: Mar 31 2008 - 7:45am
End: Apr 3 2008 - 7:00pm

Semiconductor
technology makes incredible innovations in today's society possible!

Start: 8:00 am
Start: Mar 31 2008 - 8:00am
End: Apr 2 2008 - 7:00pm

SNUG is an open forum that that provides Synopsys users worldwide with a unique opportunity to exchange ideas, discuss problems and explore solutions.

Tuesday April 1, 2008
(all day)
Start: Mar 31 2008 - 7:45am
End: Apr 3 2008 - 7:00pm

Semiconductor
technology makes incredible innovations in today's society possible!

(all day)
Start: Mar 31 2008 - 8:00am
End: Apr 2 2008 - 7:00pm

SNUG is an open forum that that provides Synopsys users worldwide with a unique opportunity to exchange ideas, discuss problems and explore solutions.

Start: 8:00 am
Start: Apr 1 2008 - 8:00am
End: Apr 3 2008 - 6:00pm

Do you want to reduce the design time for your next Lattice FPGA?
Learn how to apply the power of the Verilog language in the Lattice

Start: 9:00 am
Start: Apr 1 2008 - 9:00am
End: Apr 3 2008 - 5:00pm

The conference, now in its fourth year, is targeted at researchers and vendors actively seeking to leverage more productivity from their application codes by using: GP-GPUs, FPGAs, IBM Cell processors

Wednesday April 2, 2008
(all day)
Start: Mar 31 2008 - 7:45am
End: Apr 3 2008 - 7:00pm

Semiconductor
technology makes incredible innovations in today's society possible!

End: 7:00 pm
Start: Mar 31 2008 - 8:00am
End: Apr 2 2008 - 7:00pm

SNUG is an open forum that that provides Synopsys users worldwide with a unique opportunity to exchange ideas, discuss problems and explore solutions.

(all day)
Start: Apr 1 2008 - 8:00am
End: Apr 3 2008 - 6:00pm

Do you want to reduce the design time for your next Lattice FPGA?
Learn how to apply the power of the Verilog language in the Lattice

(all day)
Start: Apr 1 2008 - 9:00am
End: Apr 3 2008 - 5:00pm

The conference, now in its fourth year, is targeted at researchers and vendors actively seeking to leverage more productivity from their application codes by using: GP-GPUs, FPGAs, IBM Cell processors

Start: 9:00 am

Sometimes it feels as if a mountain exists between the FPGA and PCB
design worlds. That mountain is growing larger every day as new FPGA

Thursday April 3, 2008
End: 7:00 pm
Start: Mar 31 2008 - 7:45am
End: Apr 3 2008 - 7:00pm

Semiconductor
technology makes incredible innovations in today's society possible!

End: 6:00 pm
Start: Apr 1 2008 - 8:00am
End: Apr 3 2008 - 6:00pm

Do you want to reduce the design time for your next Lattice FPGA?
Learn how to apply the power of the Verilog language in the Lattice

End: 5:00 pm
Start: Apr 1 2008 - 9:00am
End: Apr 3 2008 - 5:00pm

The conference, now in its fourth year, is targeted at researchers and vendors actively seeking to leverage more productivity from their application codes by using: GP-GPUs, FPGAs, IBM Cell processors

Monday April 7, 2008
Start: 8:30 am
Start: Apr 7 2008 - 8:30am
End: Apr 9 2008 - 4:30pm

This Symposium explores emerging trends and novel ideas and concepts in
the area of VLSI. The Symposium covers a range of topics: from VLSI

Start: 8:30 am
Start: Apr 7 2008 - 8:30am
End: Apr 11 2008 - 3:00pm

The International Symposium on Asynchronous Circuits and Systems
provides a high quality forum for scientists and engineers to present
their latest research findings.

Tuesday April 8, 2008
(all day)
Start: Apr 7 2008 - 8:30am
End: Apr 9 2008 - 4:30pm

This Symposium explores emerging trends and novel ideas and concepts in
the area of VLSI. The Symposium covers a range of topics: from VLSI

(all day)
Start: Apr 7 2008 - 8:30am
End: Apr 11 2008 - 3:00pm

The International Symposium on Asynchronous Circuits and Systems
provides a high quality forum for scientists and engineers to present
their latest research findings.

Wednesday April 9, 2008
End: 4:30 pm
Start: Apr 7 2008 - 8:30am
End: Apr 9 2008 - 4:30pm

This Symposium explores emerging trends and novel ideas and concepts in
the area of VLSI. The Symposium covers a range of topics: from VLSI

(all day)
Start: Apr 7 2008 - 8:30am
End: Apr 11 2008 - 3:00pm

The International Symposium on Asynchronous Circuits and Systems
provides a high quality forum for scientists and engineers to present
their latest research findings.

Start: 8:00 am

SNUG is an open forum that that provides Synopsys users worldwide with a unique opportunity to exchange ideas, discuss problems and explore solutions.

Thursday April 10, 2008
(all day)
Start: Apr 7 2008 - 8:30am
End: Apr 11 2008 - 3:00pm

The International Symposium on Asynchronous Circuits and Systems
provides a high quality forum for scientists and engineers to present
their latest research findings.

Start: 9:00 am
End: 5:00 pm

In addition to our successful seminar series for newcomers offer PLC2 Nu Horizons and now another seminar, which deals with the implementation of processors in FPGAs XILINX.

Start: 10:00 am

In order to continue innovating and succeeding, design engineers need a trusted resource for information and analysis that helps them make the correct technology decisions.

Friday April 11, 2008
End: 3:00 pm
Start: Apr 7 2008 - 8:30am
End: Apr 11 2008 - 3:00pm

The International Symposium on Asynchronous Circuits and Systems
provides a high quality forum for scientists and engineers to present
their latest research findings.

Start: 8:30 am
End: 2:30 pm

Join experts from both Mentor Graphics and Cadence to learn more about the OVM.

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